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dc.contributor.authorHierons, RM-
dc.contributor.authorUral, H-
dc.identifier.citationAutomated Software Engineering 17(3): 217-250, Sep 2010en
dc.description.abstractGiven a finite state machine M, a checking sequence is an input sequence that is guaranteed to lead to a failure if the implementation under test is faulty and has no more states than M. There has been much interest in the automated generation of a short checking sequence from a finite state machine. However, such sequences can contain reset transitions whose use can adversely affect both the cost of applying the checking sequence and the effectiveness of the checking sequence. Thus, we sometimes want a checking sequence with a minimum number of reset transitions rather than a shortest checking sequence. This paper describes a new algorithm for generating a checking sequence, based on a distinguishing sequence, that minimises the number of reset transitions used.en
dc.description.sponsorshipThis work was supported in part by Leverhulme Trust grant number F/00275/D, Testing State Based Systems, Natural Sciences and Engineering Research Council (NSERC) of Canada grant number RGPIN 976, and Engineering and Physical Sciences Research Council grant number GR/R43150, Formal Methods and Testing (FORTEST).en
dc.subjectFinite state machineen
dc.subjectChecking sequence generationen
dc.subjectReset transitionen
dc.subjectDistinguishing sequenceen
dc.titleGenerating a checking sequence with a minimum number of reset transitionsen
dc.typeResearch Paperen
Appears in Collections:Computer Science
Dept of Computer Science Research Papers
Software Engineering (B-SERC)

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