Please use this identifier to cite or link to this item:
Title: Combinational multiple-valued circuit design by generalised disjunctive decomposition
Authors: Kalganova, T
Keywords: Multiple-valued logic;Generalized disjunctive decomposition;Combinational multiple-valued circuits (MV circuits)
Issue Date: 1997
Publisher: ECCTD'97 committees
Citation: Proceeding of the European Conference on Circuit Theory and Design, ECCTD'97, Budapest, Hungary, 1997. Vol.2. pp. 695-700
Abstract: A design of multiple-valued circuits based on the multiple-valued programmable logic arrays (MV PLA’s) by generalized disjunctive decomposition is presented. Main subjects are 1) Generalized disjunctive decomposition of multiple-valued functions using multiple-terminal multiplevalued decision diagrams (MTMDD’s); 2) Realization of functions by MV PLA-based combinatorial circuits.
Appears in Collections:Electronic and Computer Engineering
Dept of Electronic and Computer Engineering Research Papers

Files in This Item:
File Description SizeFormat 
1997_kalganova_ecctd97.pdf591.43 kBAdobe PDFView/Open

Items in BURA are protected by copyright, with all rights reserved, unless otherwise indicated.