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|Title:||FPGA-based systems for evolvable hardware|
|Keywords:||Evolvable hardware;Evolutionary computation;FPGA systems|
|Citation:||Conference of the World Academy of Science, Engineering and Technology,Vienna, Austria, 29-31 March 2006, pp. 123 - 129|
|Abstract:||Since 1992, year where Hugo de Garis has published the first paper on Evolvable Hardware (EHW), a period of intense creativity has followed. It has been actively researched, developed and applied to various problems. Different approaches have been proposed that created three main classifications: extrinsic, mixtrinsic and intrinsic EHW. Each of these solutions has a real interest. Nevertheless, although the extrinsic evolution generates some excellent results, the intrinsic systems are not so advanced. This paper suggests 3 possible solutions to implement the run-time configuration intrinsic EHW system: FPGA-based Run-Time Configuration system, JBits-based Run-Time Configuration system and Multi-board functional-level Run-Time Configuration system. The main characteristic of the proposed architectures is that they are implemented on Field Programmable Gate Array. A comparison of proposed solutions demonstrates that multi-board functional-level run-time configuration is superior in terms of scalability, flexibility and the implementation easiness.|
|Appears in Collections:||Dept of Electronic and Computer Engineering Research Papers|
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