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|Title:||Scalable VLSI design for fast GF (p) montgomery inverse computation|
|Keywords:||Montgomery inverse;Elliptic curve cryptography;Scalable hardware design|
|Citation:||IEEE International Conference on Computer & Communication Engineering, Kuala Lumpur, Malaysia, 09-11 May 2006|
|Abstract:||This paper accelerates a scalable GF(p) Montgomery inversion hardware. The hardware is made of two parts a memory and a computing unit. We modified the original memory unit to include parallel shifting of all bits which was a task handled by the computing unit. The new hardware modeling, simulating, and synthesizing is performed through VHDL for several 160-bits designs showing interesting speedup to the inverse computation.|
|Appears in Collections:||Dept of Electronic and Computer Engineering Research Papers|
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