Please use this identifier to cite or link to this item: http://buratest.brunel.ac.uk/handle/2438/12017
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dc.contributor.authorKalganova, T-
dc.contributor.editorBouchon-Meunier, B-
dc.contributor.editorFoulloy, L-
dc.contributor.editorYager, RR-
dc.coverage.spatialAnnecy, France-
dc.coverage.spatialAnnecy, France-
dc.date.accessioned2016-02-04T14:22:47Z-
dc.date.available2016-02-04T14:22:47Z-
dc.date.issued2002-
dc.identifier.citationThe 9th International Conference on Information Processing and Management of Uncertain Knowledge-Based Systems IPMU, Annecy, France, 2, pp. 689 - 696, (2002)en_US
dc.identifier.isbn2-9516453-1-7-
dc.identifier.urihttp://bura.brunel.ac.uk/handle/2438/12017-
dc.description.abstractOne of the actual problems in the evolvable hardware is the evolvability of logic circuits. In order to understand better the nature of existing problem, the probabilistic analysis can be used. This paper aims to investigate how the circuit layout evolution is carried out. This is interesting thing to do for two main reasons. Firstly, to investigate what type of genes mostly influence on the algorithm performance in evolvable hardware. Secondly, to see how effective an allocation of active logic gates might be in a digital circuit design task. In order to achieve this goal we investigate the genotypes of the best chromosomes which bring some improvements in evolutionary process. The logic circuits have been evolved using circuit layout evolution.en_US
dc.format.extent689 - 696-
dc.language.isoenen_US
dc.sourceIPMU 2002-
dc.sourceIPMU 2002-
dc.subjectEvolutionary computationen_US
dc.subjectEvolvable hardwareen_US
dc.titleA probabilistic approach to analyse the evolutionary process in circuit designen_US
dc.typeConference Paperen_US
dc.relation.isPartOfProceedings of the 9th International Conference on Information Processing and Management of Uncertain Knowledge-Based Systems, IPMU 2002-
pubs.publication-statusPublished-
pubs.publication-statusPublished-
pubs.volume2-
Appears in Collections:Dept of Electronic and Computer Engineering Research Papers

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