Please use this identifier to cite or link to this item: http://buratest.brunel.ac.uk/handle/2438/2510
Title: An extrinsic function-level evolvable hardware approach
Authors: Kalganova, T
Issue Date: 2000
Publisher: Springer
Citation: Proceeding of the Third European Conference on Genetic Programming, EuroGP2000, Edinburgh, UK, 2000
Abstract: The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in first time. The new representation of logic gate in extrinsic EHW allows us to describe behaviour of any multi-input multi-output logic function. The circuit is represented in the form of connections and functionalities of a rectangular array of building blocks. Each building block can implement primitive logic function or any multi-input multi-output logic function defined in advance. The method has been tested on evolving logic circuits using half adder, full adder and multiplier. The effectiveness of this approach is investigated for multiple-valued and binary arithmetical functions. For these functions either method appears to be much more efficient than similar approach with two-input one-output cell representation.
URI: http://bura.brunel.ac.uk/handle/2438/2510
Appears in Collections:Electronic and Computer Engineering
Dept of Electronic and Computer Engineering Research Papers

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