Please use this identifier to cite or link to this item: http://buratest.brunel.ac.uk/handle/2438/2507
Title: Some aspects of an evolvable hardware approach for multiple-valued combinational circuit design
Authors: Kalganova, T
Miller, J
Fogarty, TC
Issue Date: 1998
Publisher: Springer
Citation: Proceeding of Second International Conference on Evolvable System: From Biology to Hardware (ICES'98). Lausanne, Switzerland, 1998. pp. 78-89.
Abstract: In this paper a gate-level evolvable hardware technique for designing multiple-valued (MV) combinational circuits is proposed for the first time. In comparison with the decomposition techniques used for synthesis of combinational circuits previously employed, this new approach is easily adapted for the different types of MV gates associated with operations corresponding to different algebra types and can include other more complex logical expressions (e.g. singlecontrol MV multiplexer called T-gate). The technique is based on evolving the functionality and connectivity of a rectangular array of logic cells. The experimental results show how the success of genetic algorithm depends on the number of columns, the number of rows in circuit structure and levels-back parameter (the number of columns to the left of current cell to which cell input may be connected). We show that the choice of the set of MV gates used radically affects the chances of successful evolution (in terms of number of 100% functional solutions found).
URI: http://bura.brunel.ac.uk/handle/2438/2507
Appears in Collections:Electronic and Computer Engineering
Dept of Electronic and Computer Engineering Research Papers

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