Please use this identifier to cite or link to this item: http://buratest.brunel.ac.uk/handle/2438/12035
Title: Circuit layout evolution: An evolvable hardware approach
Authors: Kalganova, T
Miller, JF
Issue Date: 1999
Publisher: IEE Press
Citation: Coloquium on Evolutionary Hardware Systems, IEE Colloquium Digest, Proceedings of the IEE half-day Colloquium on Evolutionary Hardware Systems, 1999
Abstract: The evolvable hardware technique is based on evolving the functionality and connectivity of a rectangular array of logic cells in addition to the layout of this may. The evolutionary process contains two main steps. Initially the genome fitness in given by the percentage of output bits, which are correct. Once 100% functional circuits have been evolved, the number of gates actually used in the circuit is taken into account in the fitness function. This allows us to evolve circuit with 100% functionality and minimise the number of active gates in circuit structure. We perform a number of experiments to investigate the behaviour of the second fitness function and the circuit layout during evolution. We find that the gate usage is linearly related to the total number of gates in the chromosome.
URI: http://www.google.co.uk/url?sa=t&rct=j&q=&esrc=s&frm=1&source=web&cd=1&ved=0ahUKEwizpoTj-ufKAhWBwxQKHS5wAFgQFgggMAA&url=http%3A%2F%2Fwww.brunel.ac.uk%2F~eestttk%2FPublications%2Fpapers%2Fkalganova_ieeEHW99.pdf&usg=AFQjCNFmWLxPL6kFZLv1eU8cjw1rznUP4w
http://bura.brunel.ac.uk/handle/2438/12035
Appears in Collections:Dept of Electronic and Computer Engineering Research Papers

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