Please use this identifier to cite or link to this item: http://buratest.brunel.ac.uk/handle/2438/10226
Title: Reasoning algebraically about refinement on TSO architectures
Authors: Dongol, B
Derrick, J
Smith, G
Keywords: Total Store Order memory model;Forms of instruction reordering
Issue Date: 2014
Publisher: Springer Verlag
Citation: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 8687, 2014
Abstract: The Total Store Order memory model is widely implemented by modern multicore architectures such as x86, where local buffers are used for optimisation, allowing limited forms of instruction reordering. The presence of buffers and hardware-controlled buffer flushes increases the level of non-determinism from the level specified by a program, complicating the already difficult task of concurrent programming. This paper presents a new notion of refinement for weak memory models, based on the observation that pending writes to a process' local variables may be treated as if the effect of the update has already occurred in shared memory. We develop an interval-based model with algebraic rules for various programming constructs. In this framework, several decomposition rules for our new notion of refinement are developed. We apply our approach to verify the spinlock algorithm from the literature.
URI: http://bura.brunel.ac.uk/handle/2438/10226
ISSN: 1611-3349
Appears in Collections:Dept of Electronic and Computer Engineering Research Papers

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